Micropower Analogue Building Blocks for Template Matching in Implantable Devices

The design of analogue low power VLSI building block is very important for implantable devices, like cochlear implants and implantable cardioverter deebril-lators(ICD). In this paper we describe the micropower analogue building blocks for implementing the template matcher used for intracardiac electrogram (ICEG) clas-siication and data compression in an ICD. These blocks were fabricated using Orbit and HP 1.2 m n-well CMOS processes. The chip testing results show that these analogue building blocks meet the size, area, power consumption, and precision requirements of the micropower template matcher system. The building blocks are applicable to other implantable devices or neuromorphic systems.